INFORMATION TECHNOLOGY

Information Technology

Information Technology

Short Note

The LPC2368 contains up to 512 kB of on-chip flash memory. A new two-port flash memory accelerator maximizes performance for use with the two fast AHB-Lite buses. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be programmed In System via the serial port. The application program may also erase and/or program the flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc. The LPC2368 contains up to 64 kB of on-chip static RAM memory. Up to 32 kB of SRAM, accessible by the CPU and all three DMA controllers are on a higher-speed bus. Devices containing more than 32 kB SRAM have two additional 16 kB SRAM blocks, each situated on separate slave ports on the AHB multilayer matrix. This architecture allows the possibility for CPU and DMA accesses to be separated in such a way that there are few or no delays for the bus masters. The Vectored Interrupt Controller (VIC) takes 32 interrupt request inputs and programmably assigns them into 3 categories, FIQ, vectored IRQ, and non-vectored IRQ (William, 1982, 51).

The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. Fast Interrupt reQuest (FIQ) requests have the highest priority. If more than one request is assigned to FIQ, the VIC ORs the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine can simply start dealing with that device.

Questions & Answers

Question1

5FA2

Question 2

130

Question 3

253

Question 4

8^6|8^5|8^4|8^3|8^1|8^0

8 | 7 | 4| 1 | 9 | 3

Question 5

(A)

Question 6

Number of addressable locations = 2*1,048,576 =2* 2^20 = 2^21 Required number of address lines = 21

Question 7

The capacitor in a dynamic RAM memory cell is like a leaky bucket. It needs to be refreshed periodically or it will discharge to 0. This refresh operation is where dynamic RAM gets its name. Dynamic RAM has to be dynamically refreshed all of the time or it forgets what it is holding. The downside of all of this refreshing is that it takes time and slows down the memory. Memory cells are etched onto a silicon wafer in an array of columns (bitlines) and rows (wordlines). The intersection of a bitline and wordline constitutes the address of the memory cell.

Question 8

(C)

Question 9

All microcomputers contain microprocessors. They are the core of any microcomputer system. Microcontrollers are special-purpose computer systems, usually programmed to perform a single task. As they are computers in and of themselves, microcontrollers will have a microprocessor as part of their system hardware. A microprocessor is often also called the CPU, or Central Processing Unit, of a microcomputer. It is, in essence, the heart of a computer system. It is tasked to perform a wide variety of ...