When Gordon Moore predicted in 1965 that the number of transistors per integrated circuit chip would continue to double in each technology generation, there were just 30 transistors on a chip. Today, transistor counts-a measure of the capability of an electronic system-exceed a few hundred million for logic chips and even more for memory chips. How long can Moore's law continue?
The semiconductor industry follows Moore's law by shrinking transistor dimensions. But transistors cannot be scaled down infinitely. A few years ago, as critical dimensions approached 100 nm, a number of formidable challenges arose. It seemed that progress would slow, but during the past few years, device scaling has accelerated, as evidenced by several talks at the recent International Electron Devices Meeting (IEDM) (Goldberg, 2003).
Today's electronic devices are based on the metal oxide semiconductor field-effect transistor (MOSFET), which consists of source and drain electrodes, through which current can flow, and a gate electrode, which controls the current through the other two (see the figure). MOSFETs operate on a simple principle: When the gate voltage is low, an energy barrier prevents electrons from flowing from source to drain, whereas a high gate voltage lowers the energy barrier, allowing current to flow (see the figure). The gate electrode is separated from the silicon channel by a thin insulating layer to prevent the flow of gate current.
To comply with Moore's law, the transistor designer must shrink the distance between source and drain by a factor of square root of 2 in each technology generation. This reduces the area by a factor of 2, thereby doubling the number of transistors per chip. Remarkable advances in subwavelength lithography allow current-generation technologies with gate lengths of 65 nm to be manufactured. Economic considerations have not yet slowed progress, and state-ofthe-art technology still operates far below fundamental limits imposed by thermodynamics and quantum mechanics. The serious transistor design issues arise from materials limitations and transistor physics.
For digital applications, a transistor switch must, first, deliver a large on-current that rapidly charges and discharges the capacitance of the wires connecting it to other transistors in the circuit. The switching power is proportional to the operating frequency and to the square of the power supply voltage. Transistor scaling increases the number of gates on a chip and their operating frequency. To limit power dissipation and prevent the chip from overheating, the power supply voltage must therefore decrease in each technology generation, while maintaining the on-current.
Second, a transistor switch should conduct very little current when off. However, as the distance between the source and drain shrinks, it becomes increasingly difficult to turn a MOSFET off. Because off-currents increase exponentially with device scaling, the offstate power consumption is now substantial.
Third, transistors should switch on abruptly as the gate voltage increases. However, because the current is controlled by thermal emission over an energy barrier, it takes a change in gate voltage of at least 60 mV to change the current by a factor of 10 at room ...