ASSIGNMENT

Assignment

Assignment

Question 1

The IR (Instruction Register) stores the machine code of the current order (code understandable to the processor). Don't know what's the code of the LDA order (load the number at the memory location 50 into register A). You probably have that information somewhere. The PC (Program Counter) is a kind of a pointer that tells the processor where the next instruction is (in the computers memory). It always points at the instruction that comes after the current one. So it probably stores 21.

Can't figure out what MAR and MDR are. Probably registers that stand between the processor and the bus, and are used for temporary storage of data and memory addresses before the processor or the bus can take them. A is one of the processors registers, at the end of instruction 20 it probably stores the number 724.

Working from the F/E cycle for instruction 20,

PC ? MAR

MDR ? IR? final value of IR = 550

IR [address] ? MAR? final value of MAR = 50

MDR ? A? final value of MDR and A = 724

PC + 1? PC? final value of PC = 21

b. (BL2-)PCMARMDR IRA

PC ? MAR2121724550724

MDR ? IR2121351351724

IR [address] ? MAR2151351351724

A + MDR ? A2151006351730

PC + 1 ? PC2251006351730

Question 2

Master-slave multiprocessor system is a multi-processor system capable of realizing a multicast operation and a check event operation at high speed and high reliability, capable of clearly identifying the malfunctioning processor quickly regardless of a type of the malfunction processor. To realize the multicast operation, the system includes a multicast operation unit in which multicast data to be transferred from the master processor to the slave processors, control data provided in correspondence with the slave processors, and a multicast identification data for identifying a multicast point in the program corresponding to the multicast data are memorized, such that each of the slave processors obtains desired multicast data for desired multicast point according to the memorized multicast data, control data, and multicast identification data.

The master-slave model can be used to model the fork-join operation in parallel programs and also finds application in several industrial settings. Let a, > 0, b, > 0, and c, > 0, respectively, denote both the three tasks associated with job i and the time needed to perform these. Let n be the number of jobs as well as the number of slaves. When we are scheduling a parallel computer system using this model, we are interested in schedules that minimize the finish time or makespan (i.e,, the time at which the last task is complete). However, when scheduling industrial systems using the above model we may be interested in minimizing either the schedule finish time (i.e., makespan) or the mean finish time of the jobs.

In computing, symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture. In the case of multi-core processors, the SMP architecture ...